\doxysection{TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def Struct Reference}
\hypertarget{struct_t_i_m___break_dead_time_config_type_def}{}\label{struct_t_i_m___break_dead_time_config_type_def}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}


TIM Break input(s) and Dead time configuration Structure definition.  




{\ttfamily \#include $<$stm32h7xx\+\_\+hal\+\_\+tim.\+h$>$}

\doxysubsubsection*{Public Attributes}
\begin{DoxyCompactItemize}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_a5e97751b5e397414e2a5120eb5cef7c6}{Off\+State\+Run\+Mode}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_a49f39e31ac019b9b7a20751bfd01c6c4}{Off\+State\+IDLEMode}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_ab00ae9fa5c6daa6319883863dee6e40a}{Lock\+Level}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_a4bdc5aec84be4b728b55028491f261d4}{Dead\+Time}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_a8962430194b43ac28a14c96dd9cc44e6}{Break\+State}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_ae15ddbf3087f9a2129a52a1317339ea7}{Break\+Polarity}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_aad8158e694a62f6c071975ee4c2e5b6a}{Break\+Filter}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_ab9a983671c730c9b33852c9aa60846fb}{Break2\+State}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_af492d4b9f5e974abb51abe58d413cd17}{Break2\+Polarity}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_a3c90aabc31a34864525dad4bd3547c86}{Break2\+Filter}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_t_i_m___break_dead_time_config_type_def_ae591f2368d0be5b77d8a746e73eabe71}{Automatic\+Output}}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
TIM Break input(s) and Dead time configuration Structure definition. 

\begin{DoxyNote}{Note}
2 break inputs can be configured (BKIN and BKIN2) with configurable filter and polarity. 
\end{DoxyNote}


\label{doc-variable-members}
\Hypertarget{struct_t_i_m___break_dead_time_config_type_def_doc-variable-members}
\doxysubsection{Member Data Documentation}
\Hypertarget{struct_t_i_m___break_dead_time_config_type_def_ae591f2368d0be5b77d8a746e73eabe71}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}!AutomaticOutput@{AutomaticOutput}}
\index{AutomaticOutput@{AutomaticOutput}!TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}
\doxysubsubsection{\texorpdfstring{AutomaticOutput}{AutomaticOutput}}
{\footnotesize\ttfamily \label{struct_t_i_m___break_dead_time_config_type_def_ae591f2368d0be5b77d8a746e73eabe71} 
uint32\+\_\+t TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def\+::\+Automatic\+Output}

TIM Automatic Output Enable state, This parameter can be a value of \doxylink{group___t_i_m___a_o_e___bit___set___reset}{TIM Automatic Output Enable} \Hypertarget{struct_t_i_m___break_dead_time_config_type_def_a3c90aabc31a34864525dad4bd3547c86}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}!Break2Filter@{Break2Filter}}
\index{Break2Filter@{Break2Filter}!TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}
\doxysubsubsection{\texorpdfstring{Break2Filter}{Break2Filter}}
{\footnotesize\ttfamily \label{struct_t_i_m___break_dead_time_config_type_def_a3c90aabc31a34864525dad4bd3547c86} 
uint32\+\_\+t TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def\+::\+Break2\+Filter}

TIM break2 input filter.\+This parameter can be a number between Min\+\_\+\+Data = 0x0 and Max\+\_\+\+Data = 0xF \Hypertarget{struct_t_i_m___break_dead_time_config_type_def_af492d4b9f5e974abb51abe58d413cd17}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}!Break2Polarity@{Break2Polarity}}
\index{Break2Polarity@{Break2Polarity}!TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}
\doxysubsubsection{\texorpdfstring{Break2Polarity}{Break2Polarity}}
{\footnotesize\ttfamily \label{struct_t_i_m___break_dead_time_config_type_def_af492d4b9f5e974abb51abe58d413cd17} 
uint32\+\_\+t TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def\+::\+Break2\+Polarity}

TIM Break2 input polarity, This parameter can be a value of \doxylink{group___t_i_m___break2___polarity}{TIM Break Input 2 Polarity} \Hypertarget{struct_t_i_m___break_dead_time_config_type_def_ab9a983671c730c9b33852c9aa60846fb}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}!Break2State@{Break2State}}
\index{Break2State@{Break2State}!TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}
\doxysubsubsection{\texorpdfstring{Break2State}{Break2State}}
{\footnotesize\ttfamily \label{struct_t_i_m___break_dead_time_config_type_def_ab9a983671c730c9b33852c9aa60846fb} 
uint32\+\_\+t TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def\+::\+Break2\+State}

TIM Break2 State, This parameter can be a value of \doxylink{group___t_i_m___break2___input__enable__disable}{TIM Break input 2 Enable} \Hypertarget{struct_t_i_m___break_dead_time_config_type_def_aad8158e694a62f6c071975ee4c2e5b6a}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}!BreakFilter@{BreakFilter}}
\index{BreakFilter@{BreakFilter}!TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}
\doxysubsubsection{\texorpdfstring{BreakFilter}{BreakFilter}}
{\footnotesize\ttfamily \label{struct_t_i_m___break_dead_time_config_type_def_aad8158e694a62f6c071975ee4c2e5b6a} 
uint32\+\_\+t TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def\+::\+Break\+Filter}

Specifies the break input filter.\+This parameter can be a number between Min\+\_\+\+Data = 0x0 and Max\+\_\+\+Data = 0xF \Hypertarget{struct_t_i_m___break_dead_time_config_type_def_ae15ddbf3087f9a2129a52a1317339ea7}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}!BreakPolarity@{BreakPolarity}}
\index{BreakPolarity@{BreakPolarity}!TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}
\doxysubsubsection{\texorpdfstring{BreakPolarity}{BreakPolarity}}
{\footnotesize\ttfamily \label{struct_t_i_m___break_dead_time_config_type_def_ae15ddbf3087f9a2129a52a1317339ea7} 
uint32\+\_\+t TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def\+::\+Break\+Polarity}

TIM Break input polarity, This parameter can be a value of \doxylink{group___t_i_m___break___polarity}{TIM Break Input Polarity} \Hypertarget{struct_t_i_m___break_dead_time_config_type_def_a8962430194b43ac28a14c96dd9cc44e6}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}!BreakState@{BreakState}}
\index{BreakState@{BreakState}!TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}
\doxysubsubsection{\texorpdfstring{BreakState}{BreakState}}
{\footnotesize\ttfamily \label{struct_t_i_m___break_dead_time_config_type_def_a8962430194b43ac28a14c96dd9cc44e6} 
uint32\+\_\+t TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def\+::\+Break\+State}

TIM Break State, This parameter can be a value of \doxylink{group___t_i_m___break___input__enable__disable}{TIM Break Input Enable} \Hypertarget{struct_t_i_m___break_dead_time_config_type_def_a4bdc5aec84be4b728b55028491f261d4}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}!DeadTime@{DeadTime}}
\index{DeadTime@{DeadTime}!TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}
\doxysubsubsection{\texorpdfstring{DeadTime}{DeadTime}}
{\footnotesize\ttfamily \label{struct_t_i_m___break_dead_time_config_type_def_a4bdc5aec84be4b728b55028491f261d4} 
uint32\+\_\+t TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def\+::\+Dead\+Time}

TIM dead Time, This parameter can be a number between Min\+\_\+\+Data = 0x00 and Max\+\_\+\+Data = 0x\+FF \Hypertarget{struct_t_i_m___break_dead_time_config_type_def_ab00ae9fa5c6daa6319883863dee6e40a}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}!LockLevel@{LockLevel}}
\index{LockLevel@{LockLevel}!TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}
\doxysubsubsection{\texorpdfstring{LockLevel}{LockLevel}}
{\footnotesize\ttfamily \label{struct_t_i_m___break_dead_time_config_type_def_ab00ae9fa5c6daa6319883863dee6e40a} 
uint32\+\_\+t TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def\+::\+Lock\+Level}

TIM Lock level, This parameter can be a value of \doxylink{group___t_i_m___lock__level}{TIM Lock level} \Hypertarget{struct_t_i_m___break_dead_time_config_type_def_a49f39e31ac019b9b7a20751bfd01c6c4}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}!OffStateIDLEMode@{OffStateIDLEMode}}
\index{OffStateIDLEMode@{OffStateIDLEMode}!TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}
\doxysubsubsection{\texorpdfstring{OffStateIDLEMode}{OffStateIDLEMode}}
{\footnotesize\ttfamily \label{struct_t_i_m___break_dead_time_config_type_def_a49f39e31ac019b9b7a20751bfd01c6c4} 
uint32\+\_\+t TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def\+::\+Off\+State\+IDLEMode}

TIM off state in IDLE mode, This parameter can be a value of \doxylink{group___t_i_m___o_s_s_i___off___state___selection__for___idle__mode__state}{TIM OSSI Off\+State Selection for Idle mode state} \Hypertarget{struct_t_i_m___break_dead_time_config_type_def_a5e97751b5e397414e2a5120eb5cef7c6}\index{TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}!OffStateRunMode@{OffStateRunMode}}
\index{OffStateRunMode@{OffStateRunMode}!TIM\_BreakDeadTimeConfigTypeDef@{TIM\_BreakDeadTimeConfigTypeDef}}
\doxysubsubsection{\texorpdfstring{OffStateRunMode}{OffStateRunMode}}
{\footnotesize\ttfamily \label{struct_t_i_m___break_dead_time_config_type_def_a5e97751b5e397414e2a5120eb5cef7c6} 
uint32\+\_\+t TIM\+\_\+\+Break\+Dead\+Time\+Config\+Type\+Def\+::\+Off\+State\+Run\+Mode}

TIM off state in run mode, This parameter can be a value of \doxylink{group___t_i_m___o_s_s_r___off___state___selection__for___run__mode__state}{TIM OSSR Off\+State Selection for Run mode state} 

The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+STM32\+H7xx\+\_\+\+HAL\+\_\+\+Driver/\+Inc/\mbox{\hyperlink{stm32h7xx__hal__tim_8h}{stm32h7xx\+\_\+hal\+\_\+tim.\+h}}\end{DoxyCompactItemize}
